Products
IOPMP
DuelSemi's IOPMP module adheres to the RISC-V IOPMP architecture specification, adopts the Rapid-k model, supports configurable numbers of SIDs, Memory Domains, and Entries. Moreover, IOPMP can be flexibly integrated into SoC with either Source Enforcement or Destination Enforcement strategy, to achieve various security implementation. The lOPMP is optimized in frequency and designed to support different configurations. It is suitable for applications which require both security management and high performance, such as servers, intelligent computing chips and so on.
• Adopt Rapid-k Model, each Memory Domain (MD) contains k Entries
• Support up to 63 MDs, the total number of Entries is 63*k (up to 1024 Entries)
• Support up to 1024 SIDs and each SID can be mapped to any MD
• Support SID2DevicelD mapping configuration for each SID
• Support NAPOT/TOR address mode for each entry and the minimum address space granularity is 4KB
• Single-cycle access latency
• Support entry locking to avoid being evicted
• Support AXI4/ACE-Lite/ACE5-Lite bus protocol and APB configuration interface
• Support interrupt triggering with relevant information recorded if any access violation occurs
• Support transactions with access violation being forwarded to default address
